A trench gate type power metal-insulator-semiconductor field-effect (MISFET) includes a semiconductor substrate, an epitaxial layer (semiconductor layer) formed on the semiconductor substrate, and a plurality of trenches formed on the epitaxial layer. A channel region (body region) and a source region are formed in the epitaxial layer. For example, when the epitaxial layer is an n type layer, the channel region is a p type and the source region is are n type. The channel region is formed in a region from a surface of the epitaxial layer to a certain depth. The source region is formed on a surface portion of the channel region. The trenches pass through the source region and the channel region to reach the epitaxial layer. A gate conductor formed of polysilicon is disposed within the trenches. Inner walls of the trenches are covered by a gate insulating film. Thus, the gate conductor is opposite the channel region, while having the gate insulating film interposed therebetween. In this manner, an MIS structure is formed. When a control voltage having threshold value or higher is applied to the gate conductor, an inversion layer (channel) is formed at a portion opposite the trenches in the channel region. Thereby, a current path is formed starting from the epitaxial layer (drain region) under the channel region, through the channel region, to the source region.
The trench gate type power MISFET has a structure in which current flows in a thickness direction of the semiconductor substrate, and thus a width of the gate per unit area of the semiconductor substrate may be increased. Thus, this structure is advantageous in reducing ON resistance.
A plurality of trenches may be formed to have, for example, a stripe shape. In this case, for example, a single trench and the epitaxial layer at one side may be regarded as a unit cell. In the power MISFET, a source region of the plurality of unit cells arranged on the semiconductor substrate is commonly connected to a source electrode. An interval (space) between the trenches is called a cell pitch. A current density per unit area can be increased by increasing an integration density of the unit cells through reduction of the cell pitch, by which theoretically the ON resistance can be further reduced.
However, the research conducted by the inventor of the present disclosure indicates that the ON resistance is not reduced as much as theoretically expected although the cell pitch is reduced. Details thereof are as follows.
With respect to a semiconductor device having a source electrode of a stacking structure including an adhesion layer and an electrode main body layer, the inventor of the present disclosure has manufactured a plurality of samples having different cell pitches and reviewed the manufactured samples. As a result, in a sample having a reduced cell pitch, a void was created between the adhesion layer and an active region in trenches (an epitaxial layer having a source region on the top surface thereof).
More specifically, to make an ohmic-contact between the adhesion layer and the active region, thermal treatment is executed after the source electrode is formed. Accordingly, the adhesion layer reacts with silicon of the active region to be silicidized. However, if supply of silicon to the adhesion layer is insufficient, it causes avoid to be created between the adhesion layer and the active region.
If the contact area between the adhesion layer and the active region is reduced, the number of atoms which are silicidized among the metal atoms constituting the adhesion layer is reduced, resulting in suppression of the creation of a void. However, in terms of securing required reliability, the contact area between the adhesion layer and the active region should be increased to ensure an electrical connection between the source electrode and the active region. If the contact area is increased, the number of atoms that are silicidized among the metal atoms constituting the adhesion layer is increased. However, a void may be created due to a shortage of silicon supply, because a sufficient number of silicon atoms may not be supplied from the active region having a small width within trenches. Thus, contact resistance between the source electrode and the active region is increased, and as a result, ON resistance cannot be reduced.
In this manner, when the cell pitch is reduced, it is difficult to reduce ON resistance while securing reliability.